1. Technical Field:
The present invention relates in general to interfaces for transmitting data within a data processing system and in particular to interfaces utilizing logical drivers to transmit data within a data processing system. Still more particularly, the present invention relates to parallel port interfaces utilizing logical drivers to transmit data within a data processing system.
2. Description of the Related Art:
For cable communications with high speed peripherals, parallel transmission utilizing parallel port interfaces are favored over serial communication systems in data processing systems. Many parallel port interfaces utilize drivers configured as a so-called "open collector" driver circuit. This type of circuit has been widely utilized in parallel port interfaces for data processing systems. "Open collector" drivers, however, have a slow rise time that is usually not considered critical as long as the overall speed of the parallel port interface is limited to under 200 kilobytes per second. Newer parallel port interfaces passes higher speed capabilities to allow for faster transmission of data. These high speed drivers typically utilize a "push-pull" or "totem pole" configuration to provide for faster transmission of data. One drawback of such high speed drivers is that they are often not compatible with many existing parallel connect devices.
For example, many devices designed to communicate with a parallel port interface utilizing "open collector" driver outputs may drive more than one output simultaneously. In such a situation, the drivers in the device may be active low wired "OR". High speed drivers utilizing a "push-pull" type configuration may function incorrectly if more than one "totem pole" is utilized to drive a bus at the same time. A "bus" is defined as an electrical signal pathway that connects one or more outputs to one or more inputs. Bus is a broad term that covers any trace or wire connecting integrated circuits or other electrical devices. As a result, circuit designers must design interface circuits containing totem pole type drivers in which only one driver on the same bus may be enabled at any one time.
Additionally, many devices designed to communicate with parallel port interfaces containing open collector drivers sometimes include lines that are connected to a so-called "hard" ground. In such a situation, connecting this type of device with a parallel port interface utilizing a totem pole driver system might result in damage to the parallel port interface.
Therefore, it would be desirable to have a parallel port interface that would allow for full compatibility with existing driver interfaces as well as provide for high speed capabilities.